DocumentCode :
1434304
Title :
A 5-ns GaAs 16-kb SRAM
Author :
Matsue, Shuichi ; Makino, Hiroshi ; Noda, Minoru ; Nakano, Hirofumi ; Takano, Satoshi ; Nishitani, Kazuo ; Kayano, Shimpei
Author_Institution :
Mitsubishi Electr. Corp., Itami, Japan
Volume :
26
Issue :
10
fYear :
1991
fDate :
10/1/1991 12:00:00 AM
Firstpage :
1399
Lastpage :
1406
Abstract :
A GaAs 4 K×4-b static-Ram (SRAM) with high speed and high reliability has been developed for practical systems. By adopting a novel basic circuit technique to the peripheral circuits, the RAM operates over a wide temperature range. By using a novel memory cell, the soft-error rate is reduced to less than that of commercial silicon emitter-coupled-logic (ECL) RAMs. Furthermore, by adopting a triple-level interconnection process, the chip area is reduced to 58% of that using a double-level one. The RAM operates at a single supply voltage of 1.8 V. At an ambient temperature of between 25 and 100°C, the RAM is guaranteed a 5.0-ns access time, 2.0-W power dissipation, and ±0.1-V supply voltage tolerance
Keywords :
III-V semiconductors; SRAM chips; circuit reliability; field effect integrated circuits; gallium arsenide; integrated circuit technology; 1.8 V; 16 Kbit; 25 to 100 degC; 5 ns; GaAs; SRAM; access time; chip area; peripheral circuits; power dissipation; reliability; single supply voltage; soft-error rate; supply voltage tolerance; temperature range; triple-level interconnection process; Circuit synthesis; Computer errors; FETs; Gallium arsenide; Integrated circuit interconnections; Random access memory; Read-write memory; Research and development; Silicon; Voltage;
fLanguage :
English
Journal_Title :
Solid-State Circuits, IEEE Journal of
Publisher :
ieee
ISSN :
0018-9200
Type :
jour
DOI :
10.1109/4.90094
Filename :
90094
Link To Document :
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