Title :
VHDL Implementation of a Flexible and Synthesizable FFT Processor
Author :
Correa, I.S. ; Freitas, L.C. ; Klautau, A. ; Costa, J. C W A
Author_Institution :
Fed. Univ. of Para (UFPA), Belem, Brazil
Abstract :
This paper presents the current stage of development of a fast Fourier transform (FFT) processor in VHDL. This processor uses fixed-point as numeric representation, taking advantage of the facilities provided by the IEEE fixed point package. Its main advantages is that it is being developed as fully parameterizable processor, in a way that the number of bits, fixed point position and number of points computed in the FFT can be easily changed. It is also able to be used in several applications such as classification algorithms and communications systems. An open source prototype core has been developed and it can perform a complete FFT transform using radix-2 with decimation in time. Results and details of this implementation are presented.
Keywords :
fast Fourier transforms; fixed point arithmetic; hardware description languages; microprocessor chips; pattern classification; IEEE fixed point package; VHDL implementation; classification algorithm; communication system; fast Fourier transform processor; numeric representation; open source prototype core; parameterizable processor; radix-2; synthesizable FFT processor; Clocks; Discrete Fourier transforms; Educational institutions; Field programmable gate arrays; Hardware; Laboratories; Wireless sensor networks; FFT; VHDL language; digital hardware design;
Journal_Title :
Latin America Transactions, IEEE (Revista IEEE America Latina)
DOI :
10.1109/TLA.2012.6142457
