A novel temperature compensating method of Logarithmic Amplifier in RSSI

Author

Chunfeng Bai ; Jianhui Wu

Author_Institution

Nat. ASIC Syst. Eng. Res. Center, Southeast Univ., Nanjing, China

fYear

2014

fDate

13-16 April 2014

Firstpage

271

Lastpage

275

Abstract

In this paper, we will present a new temperature compensating scheme dedicated to building CMOS Logarithmic Amplifier, which is suitable to low power applications. We propose a master-slave configuration to interrelate the PTAT (proportional to absolute temperature) coefficient of the Logarithmic Amplifier with the PTAT current, which can be obtained from the Band-gap Voltage Reference. With this method, a Low-Temperature-Coefficient Logarithmic Amplifier is obtained without any external components. This approach has been verified via Cadence simulation in TSMC 0.13μm CMOS process. A RSSI with such a logarithmic amplifier consumes only 145μW under the supply of 1.2V. This method and the complete circuit are presented in detail with the associated results.

Keywords

CMOS analogue integrated circuits; amplifiers; compensation; reference circuits; CMOS logarithmic amplifier; Cadence simulation; RSSI; TSMC CMOS process; band-gap voltage reference; low-temperature-coefficient logarithmic amplifier; master-slave configuration; power 145 muW; proportional to absolute temperature coefficient; size 0.13 mum; temperature compensating method; voltage 1.2 V; Detectors; Photonic band gap; Resistors; Temperature distribution; Transistors; Wireless communication; CMOS; Logarithmic Amplifier; Low power; Master-Slave configuration; PTAT current; Temperature compensating;

fLanguage

English

Publisher

ieee

Conference_Titel

Mediterranean Electrotechnical Conference (MELECON), 2014 17th IEEE

Conference_Location

Beirut

Type

conf

DOI

10.1109/MELCON.2014.6820545

Filename

6820545