A metric for estimating the fault-secure behavior of digital circuits

A new fault secure metric (FSM) for design analysis of digital circuits is presented; it can be applied at a very early stage of the design cycle. A set of FSM models is also presented; they calculate the FSM of a circuit directly from its structural attributes. The quantities used in these FSM models are measurable from circuit analysis, and directly depend on measurable attributes of the circuit; thus the subjectivity of the FSM is minimal. The FSM models are consistent, in that only the attribute input values change for a specific circuit application. Hence, the cost of obtaining a figure of merit depends only on the cost of determining the circuit´s attributes. This consistency also lends itself to automation of attribute measurements and FSM calculations. The FSM can be used to evaluate the FSM of a design, as well as the relative FS performance of various circuit design techniques. A case study using a 2-rail encoded test circuit demonstrates the validity of the FSM. The FSM models directly depend on measurable attributes of the circuit, so that the subjectivity of the FSM is minimal, and they are consistent, in that only the attribute input values change for a specific circuit application. Hence, the cost of obtaining a figure of merit depends only on the cost of determining the circuit´s attributes. This consistency lends itself to automation of attribute measurements and FSM calculations. The validity of the FSM has been demonstrated for a 2-rail test circuit design