Title :
Analysis of improved adiabatic pseudo-domino logic family
Author :
Patel, D.C. ; Morton, E.J.
Author_Institution :
Dept. of Electron., Surrey Univ., Guildford, UK
fDate :
9/17/1998 12:00:00 AM
Abstract :
The authors show that when an improved adiabatic pseudo-domino logic circuit is used to perform complex logic, the circuit is susceptible to switching noise and logic failure
Keywords :
CMOS logic circuits; failure analysis; logic CAD; adiabatic pseudo-domino logic family; complex logic; logic failure; switching noise;
Journal_Title :
Electronics Letters
DOI :
10.1049/el:19981311
