Title :
Optimisation of Montgomery modular multiplication algorithm for systolic arrays
Author :
Shin, Jun-Bum ; Kim, Joungkyou ; Lee-Kwang, Hyung
Author_Institution :
Dept. of Comput. Sci., Korea Adv. Inst. of Sci. & Technol., Seoul, South Korea
fDate :
9/17/1998 12:00:00 AM
Abstract :
An improved systolic array for the Montgomery modular multiplication algorithm is presented. The recursive equation proposed by Walter [1993] is explicitly transformed into Boolean algebraic equations. By analysing and optimising these equations an improved systolic array can be made 20% faster than that proposed by Walter
Keywords :
Boolean algebra; multiplying circuits; systolic arrays; Boolean algebraic equations; Montgomery modular multiplication algorithm; recursive equation; systolic arrays;
Journal_Title :
Electronics Letters
DOI :
10.1049/el:19981299
