A model of the stress induced leakage current in gate oxides

Author

Larcher, Luca ; Paccagnella, Alessandro ; Ghidini, Gabriella

Author_Institution

Dipartimento di Sci. dell´´Ingegneria, Modena Univ., Italy

Volume

48

Issue

2

fYear

2001

fDate

2/1/2001 12:00:00 AM

Firstpage

285

Lastpage

288

Abstract

A new quantitative model of the stress induced leakage current (SILC) in MOS capacitors with thin oxide layers has been developed by assuming the inelastic trap-assisted tunneling as the conduction mechanism. The oxide band structure has been simplified by replacing the trapezoidal barrier with two rectangular barriers. An excellent agreement between simulations and experiments has been found by adopting a trap distribution Gaussian in space and in energy. Only minor variations of the trap distribution parameters were observed by increasing the injected charge during electrical stress, indicating that oxide neutral defects with similar characteristics are generated at any stage of the stress

Keywords

MOS capacitors; band structure; dielectric thin films; interface states; leakage currents; semiconductor device models; tunnelling; MOS capacitors; SILC model; SiO₂-Si; conduction mechanism; electrical stress; gate oxides; inelastic trap-assisted tunneling; injected charge; oxide band structure simplification; oxide neutral defects; quantitative model; stress induced leakage current; thin oxide layers; trap distribution Gaussian; trap distribution parameters; trapezoidal barrier replacement; two rectangular barriers; Anodes; Cathodes; Character generation; Electric variables; Electron traps; Helium; Leakage current; MOS capacitors; Stress; Tunneling;

fLanguage

English

Journal_Title

Electron Devices, IEEE Transactions on

Publisher

ieee

ISSN

0018-9383

Type

jour

DOI

10.1109/16.902728

Filename

902728