A self-convergence erase for NOR flash EEPROM using avalanche hot carrier injection

Author

Yamada, Seiji ; Yamane, Tomoko ; Amemiya, Kazumi ; Naruke, Kiyomi

Author_Institution

Microelectron Eng. Lab., Toshiba Corp., Kanagawa, Japan

Volume

43

Issue

11

fYear

1996

fDate

11/1/1996 12:00:00 AM

Firstpage

1937

Lastpage

1941

Abstract

A new erasing method for simple stacked gate NOR Flash EEPROM´s is proposed and is applied to 2 M bit NOR Flash test array using 0.6 μm CMOS technology. Due to avalanche hot carrier injection after erasure by Fowler-Nordheim (F-N) tunneling current, the threshold voltages converge to a certain steady state. The steady state is a point of balance between the avalanche hot electron injection and the avalanche hot hole injection into the floating gate, and can be controlled easily by the channel doping and the applying control-gate voltage during convergence operation. The erasing method eliminates the problem of over-erased cells and realizes highly stable flash memory erasure

Keywords

CMOS memory circuits; EPROM; NOR circuits; avalanche breakdown; hot carriers; 0.6 micron; 2 Mbit; CMOS technology; Fowler-Nordheim tunneling current; avalanche hot carrier injection; channel doping; control-gate voltage; floating gate; self-convergence erase; stacked gate NOR flash EEPROM array; threshold voltage; CMOS technology; EPROM; Hot carrier injection; Hot carriers; Secondary generated hot electron injection; Steady-state; Testing; Threshold voltage; Tunneling; Voltage control;

fLanguage

English

Journal_Title

Electron Devices, IEEE Transactions on

Publisher

ieee

ISSN

0018-9383

Type

jour

DOI

10.1109/16.543030

Filename

543030