DocumentCode :
1438795
Title :
Hierarchical ATPG for analog circuits and systems
Author :
Soma, Mani ; Huynh, Sam ; Zhang, Jinyan ; Kim, Seongwon ; Devarayanadurg, Giri
Author_Institution :
Washington Univ., Seattle, WA, USA
Volume :
18
Issue :
1
fYear :
2001
Firstpage :
72
Lastpage :
81
Abstract :
Automatic test-pattern generation (ATPG) algorithms for analog circuits have been under intense investigation for the last several years. As system design aggressively moves to system-on-a-chip (SoC) and core-based integration, hierarchical analog ATPG emerges as an even more difficult challenge. Attempts to develop an effective algorithm have had varying degrees of success. This article reviews some fundamental issues and recent work in hierarchical analog ATPG and presents an algorithm based on controllability and observability computation. This algorithm has been implemented in a prototype tool, and results based on several case studies show the application of the technique
Keywords :
analogue circuits; automatic test pattern generation; circuit complexity; controllability; observability; analog circuits; automatic test-pattern generation; controllability; core-based integration; hierarchical ATPG; observability; prototype tool; system design; system-on-a-chip; Analog circuits; Analog computers; Automatic test pattern generation; Automatic testing; Circuit faults; Circuit simulation; Circuit testing; Electrical fault detection; Sensitivity analysis; System testing;
fLanguage :
English
Journal_Title :
Design & Test of Computers, IEEE
Publisher :
ieee
ISSN :
0740-7475
Type :
jour
DOI :
10.1109/54.902824
Filename :
902824
Link To Document :
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