A hierarchical reliability analysis for circuit design evaluation

We suggest a computationally efficient and flexible strategy for assessment of reliability of integrated circuits. The concept of hierarchical reliability analysis proposed relies on doing reliability assessments during the design and layout process [reliability computer aided design (RCAD)]. Design rules are suggested based on calculations of steady-state mechanical stresses built up in interconnect graphs and trees due to electromigration. These design rules identify a large fraction of interconnect graphs in a typical design as immune to electromigration-induced failure. The stated design rules are an extension of the Blech-length concept to interconnect graphs. Our suggested new strategy will have important implications for design and layout processes as design limits for a given technology are reached