DocumentCode :
1439658
Title :
Near-Optimal Cache Block Placement with Reactive Nonuniform Cache Architectures
Author :
Hardavellas, N. ; Ferdman, Michael ; Falsafi, Babak ; Ailamaki, A.
Volume :
30
Issue :
1
fYear :
2010
Firstpage :
29
Lastpage :
29
Abstract :
The growing core counts and caches of modern processors result in data access latency becoming a function of the data´s physical location in the cache. Thus, the placement of cache blocks determines the cache´s performance. Reactive nonuniform cache architectures (R-NUCA) achieve near-optimal cache block placement by classifying blocks online and placing data close to the cores that use them.
Keywords :
cache storage; information retrieval; microprocessor chips; data access; data physical location; growing core counts; modern processors; near optimal cache block placement; reactive nonuniform cache architectures; Aggregates; Communication switching; Cooling; Costs; Delay effects; Manufacturing processes; Robustness; Switches; Wire; cache memories; data placement; multicore; nonuniform cache architectures; parallel architectures;
fLanguage :
English
Journal_Title :
Micro, IEEE
Publisher :
ieee
ISSN :
0272-1732
Type :
jour
DOI :
10.1109/MM.2010.22
Filename :
5430736
Link To Document :
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