A Time-to-Digital Converter Based on a Multiphase Reference Clock and a Binary Counter With a Novel Sampling Error Corrector

Author

Choi, Kwang-Chun ; Lee, Seung-Woo ; Lee, Bhum-Cheol ; Choi, Woo-Young

Author_Institution

Dept. of Electr. & Electron. Eng., Yonsei Univ., Seoul, South Korea

Volume

59

Issue

3

fYear

2012

fDate

3/1/2012 12:00:00 AM

Firstpage

143

Lastpage

147

Abstract

A new type of sampling error corrector for a time- to-digital converter (TDC) having a multiphase reference clock and a binary counter is demonstrated. With this corrector, sampling errors caused by asynchronous TDC inputs are corrected without requiring additional counters or reclocking circuits. A TDC having the corrector is implemented in 90-nm CMOS logic technology. It has 13.6-ps/least significant bit resolution and 13-bit input dynamic range. It consumes 18 mW from a 1.2-V supply and occupies a 100 × 210 μm² chip area.

Keywords

CMOS logic circuits; analogue-digital conversion; counting circuits; CMOS logic technology; asynchronous TDC; binary counter; multiphase reference clock; power 18 mW; sampling error corrector; size 90 nm; time-to-digital converter; voltage 1.2 V; CMOS integrated circuits; Clocks; Delay; Dynamic range; Oscillators; Radiation detectors; Synchronization; Counter; multiphase clock; sampling error correction; time-to-digital converter (TDC);

fLanguage

English

Journal_Title

Circuits and Systems II: Express Briefs, IEEE Transactions on

Publisher

ieee

ISSN

1549-7747

Type

jour

DOI

10.1109/TCSII.2012.2184370

Filename

6145624