Author :
Lau, Benedict ; Chan, Yiu-Fai ; Moncayo, Alfredo ; Ho, John ; Allen, Mike ; Salmon, Joe ; Liu, Jonathan ; Muthal, Manish ; Lee, Cliff ; Nguyen, Tim ; Horine, Bryce ; Leddige, Mike ; Huang, Kuojim ; Wei, Jason ; Yu, Leung ; Tarver, Richard ; Hsia, Yuwen ;
Author_Institution :
Rambus, Mountain View, CA, USA
Abstract :
A 2.6 GByte/s megacell that interfaces to single or double byte wide DRAMs or logic chips is implemented using 0.35-0.18 μm CMOS technologies. Special I/O circuits are used to guarantee 800 Mbit/s/pin data rate. Microwave PC board design methodologies are used to achieve the maximum possible interconnect bandwidth
Keywords :
CMOS digital integrated circuits; application specific integrated circuits; computer interfaces; synchronisation; timing; 0.18 to 0.35 micron; 2.6 GByte/s; 800 Mbit/s; CMOS technologies; DRAMs; GByte/s megacell; I/O circuits; logic chips; microwave PC board design methodologies; multipurpose chip-to-chip interface; Application specific integrated circuits; Bandwidth; CMOS logic circuits; CMOS technology; Circuit testing; Clocks; Delay; Microwave theory and techniques; Random access memory; Voltage;
