DocumentCode :
1440137
Title :
A 60-mW MPEG4 video codec using clustered voltage scaling with variable supply-voltage scheme
Author :
Takahashi, Masafumi ; Hamada, Mototsugu ; Nishikawa, Tsuyoshi ; Arakida, Hideho ; Fujita, Tetsuya ; Hatori, Fumitoshi ; Mita, Shinji ; Suzuki, Kojiro ; Chiba, Akihiko ; Terazawa, Toshihiro ; Sano, Fumihiko ; Watanabe, Yoshinori ; Usami, Kimiyoshi ; Igaras
Author_Institution :
Syst. ULSI Eng. Lab., Toshiba Corp., Kawasaki, Japan
Volume :
33
Issue :
11
fYear :
1998
fDate :
11/1/1998 12:00:00 AM
Firstpage :
1772
Lastpage :
1780
Abstract :
A 60-mW MPEG4 video codec has been developed for mobile multimedia applications. This codec supports both the H.263 ITU-T recommendation and the simple profile of MPEG4 committee draft version 1 released in November 1997. It is composed of a 16-bit reduced instruction set computer processor and several dedicated hardware engines so as to satisfy both power efficiency and programmability. It performs 10 frames/s of encoding and decoding with quarter-common intermediate format at 30 MHz. Several innovative low-power techniques were employed in both architectural and circuit levels, and the final power dissipation is 60 mW at 30 MHz, which is only 30% of the power dissipation for a conventional CMOS design. The chip was fabricated in a 0.3-μm CMOS with double-well and triple-metal technology. It contains 3 million transistors, including a 52-kB on-chip SRAM. Internal supply voltages of 2.5 and 1.75 V are generated by on-chip dc-dc converters from 3.3-V external supply voltage
Keywords :
CMOS digital integrated circuits; mobile communication; multimedia communication; pipeline processing; reduced instruction set computing; video codecs; 0.3 micron; 16 bit; 3.3 V; 30 MHz; 60 mW; H.263 ITU-T recommendation; MPEG4 committee draft version 1; MPEG4 video codec; architectural level; clustered voltage scaling; dedicated hardware engines; double-well triple-metal technology; internal supply voltages; low-power techniques; mobile multimedia applications; on-chip SRAM; power efficiency; programmability; quarter-common intermediate format; reduced instruction set computer processor; variable supply-voltage scheme; Application software; Computer aided instruction; Decoding; Encoding; Engines; Hardware; MPEG 4 Standard; Power dissipation; Video codecs; Voltage;
fLanguage :
English
Journal_Title :
Solid-State Circuits, IEEE Journal of
Publisher :
ieee
ISSN :
0018-9200
Type :
jour
DOI :
10.1109/4.726575
Filename :
726575
Link To Document :
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