A new cobalt salicide technology for 0.15-μm CMOS devices

A new cobalt (Co) salicide technology for sub-quarter micron CMOS transistors has been developed using high-temperature sputtering and in situ vacuum annealing. Sheet resistance of 11 Ω/□ for both gate electrode and diffusion layer was obtained with 5-nm-thick Co film. No line width dependence of sheet resistance was observed down to 0.15-μm-wide gate electrode and 0.33-μm-wide diffusion layer. The high temperature sputtering process led to the growth of epitaxial CoSi ₂ layers with high thermal stability. By using this technology 0.15 μm CMOS devices which have shallow junctions were successfully fabricated