• DocumentCode
    1440949
  • Title

    Organic-Transistor-Based Nano-Floating-Gate Memory Devices Having Multistack Charge-Trapping Layers

  • Author

    Kim, Yong-Mu ; Kim, Soo-Jin ; Lee, Jang-Sik

  • Author_Institution
    Sch. of Adv. Mater. Eng., Kookmin Univ., Seoul, South Korea
  • Volume
    31
  • Issue
    5
  • fYear
    2010
  • fDate
    5/1/2010 12:00:00 AM
  • Firstpage
    503
  • Lastpage
    505
  • Abstract
    Nano-floating-gate memory devices having multistack charge-trapping layers are developed. Controlled gold nanoparticles encapsulated with polyelectrolytes are used as charge-trapping elements. Programmable memory characteristics are observed according to the programming/erasing operations in pentacene-based organic-transistor memory devices. The memory window can be increased effectively by the adoption of multistack charge-trapping layers. The data-retention measurement shows that the programmed/erased states are maintained relatively well according to the time elapsed. This letter is based on simple solution processes at low temperature, so it has a potential use in fabricating nano-floating-gate memory devices on plastic substrates.
  • Keywords
    nanoelectronics; organic field effect transistors; random-access storage; substrates; charge-trapping elements; controlled gold nanoparticles encapsulation; data-retention measurement; multistack charge-trapping layers; nanofloating-gate memory devices; organic transistors; pentacene-based organic-transistor memory devices; plastic substrates; polyelectrolytes; programmable memory characteristics; Gold nanoparticles; nonvolatile memory; organic memory; pentacene;
  • fLanguage
    English
  • Journal_Title
    Electron Device Letters, IEEE
  • Publisher
    ieee
  • ISSN
    0741-3106
  • Type

    jour

  • DOI
    10.1109/LED.2010.2041743
  • Filename
    5431027