Title :
Total dose performance at 77 K of a radiation hard 0.35 μm CMOS SOI technology
Author :
Jenkins, W.C. ; Liu, S.T.
Author_Institution :
Naval Res. Lab., Washington, DC, USA
fDate :
12/1/2000 12:00:00 AM
Abstract :
This paper is the first demonstration that a 0.35 μm CMOS technology designed to be radiation hard at room temperature is total ionizing dose radiation hard at 77 K to 1 Mrd (SiO2). We compare radiation results from 0.35 μm n-FET´s irradiated with 60Co gamma rays at both 77 K and 300 K. We have demonstrated that interface traps play no appreciable role in the radiation performance of this technology at cryogenic temperatures
Keywords :
MOSFET; cryogenic electronics; gamma-ray effects; interface states; radiation hardening (electronics); silicon-on-insulator; 0.35 micron; 300 K; 77 K; CMOS SOI technology; cryogenic temperature; gamma-ray irradiation; interface trap; n-FET; radiation hardness; total ionizing dose radiation; CMOS technology; Cryogenics; FETs; Ionizing radiation; Isolation technology; Laboratories; Monitoring; Radiation hardening; Silicon on insulator technology; Temperature;
Journal_Title :
Nuclear Science, IEEE Transactions on
