Circuit technique for threshold voltage stabilization using substrate bias in total dose environments

Author

Shreedhara, Jayanth K. ; Barnaby, Hugh J. ; Bhuva, Bharat L. ; Kerns, David V., Jr. ; Kerns, Sherra E.

Author_Institution

Dept. of Electr. Eng. & Comput. Sci., Vanderbilt Univ., Nashville, TN, USA

Volume

47

Issue

6

fYear

2000

fDate

12/1/2000 12:00:00 AM

Firstpage

2557

Lastpage

2560

Abstract

Radiation tolerance of CMOS circuits to total dose can be improved by adjusting the p-substrate voltage to keep the n-channel threshold voltage above a minimum value. This paper presents a circuit design, implemented on an IC and on a breadboard, for dynamically adjusting the substrate voltage. Experimental results clearly show that devices with threshold voltage stabilization exhibit longer lifetime as compared to those without the stabilization circuit

Keywords

CMOS integrated circuits; circuit stability; integrated circuit reliability; radiation effects; radiation hardening (electronics); CMOS circuits; IC reliability; n-channel threshold voltage; p-substrate voltage; radiation tolerance; substrate bias; threshold voltage stabilization; total dose environments; Capacitance; Circuit noise; Circuit synthesis; Degradation; Helium; MOSFET circuits; Semiconductor device noise; Semiconductor devices; Substrates; Threshold voltage;

fLanguage

English

Journal_Title

Nuclear Science, IEEE Transactions on

Publisher

ieee

ISSN

0018-9499

Type

jour

DOI

10.1109/23.903808

Filename

903808