Title :
Hydra: A Block-Mapped Parallel Flash Memory Solid-State Disk Architecture
Author :
Seong, Yoon Jae ; Nam, Eyee Hyun ; Yoon, Jin Hyuk ; Kim, Hongseok ; Choi, Jin-Yong ; Lee, Sookwan ; Bae, Young Hyun ; Lee, Jaejin ; Cho, Yookun ; Min, Sang Lyul
Author_Institution :
Sch. of Comput. Sci. & Eng., Seoul Nat. Univ., Seoul, South Korea
fDate :
7/1/2010 12:00:00 AM
Abstract :
Flash memory solid-state disks (SSDs) are replacing hard disk drives (HDDs) in mobile computing systems because of their lower power consumption, faster random access, and greater shock resistance. We describe Hydra, a high-performance flash memory SSD architecture that translates the parallelism inherent in multiple flash memory chips into improved performance, by means of both bus-level and chip-level interleaving. Hydra has a prioritized structure of memory controllers, consisting of a single high-priority foreground unit, to deal with read requests, and multiple background units, all capable of autonomous execution of sequences of high-level flash memory operations. Hydra also employs an aggressive write buffering mechanism based on block mapping to ensure that multiple flash memory chips are used effectively, and also to expedite the processing of write requests. Performance evaluation of an FPGA implementation of the Hydra SSD architecture shows that its performance is more than 80 percent better than the best of the comparable HDDs and SSDs that we considered.
Keywords :
field programmable gate arrays; flash memories; parallel memories; performance evaluation; FPGA; Hydra; block-mapped parallel flash memory; high-level flash memory operations; performance evaluation; read requests; solid-state disk architecture; write buffering mechanism; write requests; Computer architecture; Electric shock; Energy consumption; Flash memory; Hard disks; Interleaved codes; Memory architecture; Mobile computing; Parallel processing; Solid state circuits; Flash memory; flash translation layer (FTL); solid-state disk (SSD); storage system.;
Journal_Title :
Computers, IEEE Transactions on