DocumentCode
1443832
Title
Application of plasma immersion ion implantation doping to low-temperature processed poly-Si TFTs
Author
Yeh, Ching-Fa ; Chen, Tai-Ju ; Liu, Chung ; Shao, Jiquan ; Cheung, Nathan W.
Author_Institution
Dept. of Electron. Eng., Nat. Chiao Tung Univ., Hsinchu, Taiwan
Volume
19
Issue
11
fYear
1998
Firstpage
432
Lastpage
434
Abstract
This work applied, for the first time, plasma immersion ion implantation (PIII) for source/drain doping on low-temperature processed polysilicon thin-film transistors (poly-Si TFTs). Experimental results indicate that PIII doping can provide adequate dopant concentration and junction depth for source/drain. In addition, H/sub 2/-diluted phosphorus PIII can promote dopant activation more efficiently during RTA at 600/spl deg/C than with conventional ion implantation (II) technology. The excellent characteristics of PIII doped poly-Si TFTs resemble those of conventional II doped ones.
Keywords
elemental semiconductors; ion implantation; plasma materials processing; rapid thermal annealing; semiconductor doping; silicon; thin film transistors; 600 C; H/sub 2/ dilution; RTA; Si:P; dopant activation; junction depth; low temperature processing; plasma immersion ion implantation doping; polysilicon thin film transistor; Active matrix technology; Contamination; Doping; Furnaces; Ion implantation; Plasma immersion ion implantation; Rapid thermal annealing; Space vector pulse width modulation; Substrates; Thin film transistors;
fLanguage
English
Journal_Title
Electron Device Letters, IEEE
Publisher
ieee
ISSN
0741-3106
Type
jour
DOI
10.1109/55.728903
Filename
728903
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