Depletion-region width of p-n junction under high forward-bias conditions

A new technique is used for the accurate analysis of linearly graded and Gaussian-graded p-n junctions, which permits calculation of the depletion-region width under high forward-bias conditions. Such an analysis is very useful for applications in which one wishes to analyse a complete junction-device structure (such as a bipolar transistor). The results obtained represent a considerable improvement in space-charge modelling over previous approaches to approximate linear analysis. The computer algorithm is discussed as a solution process for implementing the scheme.