• DocumentCode
    1444913
  • Title

    Hardware structure for Walsh-Hadamard transforms

  • Author

    Bi, Guoan ; Evans, B.G.

  • Author_Institution
    Sch. of Electr. & Electron. Eng., Nanyang Technol. Inst., Singapore
  • Volume
    34
  • Issue
    21
  • fYear
    1998
  • fDate
    10/15/1998 12:00:00 AM
  • Firstpage
    2005
  • Lastpage
    2006
  • Abstract
    An efficient hardware structure is reported for the Walsh-Hadamard transform. Based on the radix-2 algorithm, the structure can be implemented with shift registers and controllable adder/subtracters for high processing throughput. Such an implementation is particularly suited to applications that require real-time operations and interface directly with sequential input data
  • Keywords
    Hadamard transforms; Walsh functions; adders; real-time systems; shift registers; Walsh-Hadamard transforms; controllable adder/subtracters; hardware structure; processing throughput; radix-2 algorithm; real-time operations; sequential input data; shift registers;
  • fLanguage
    English
  • Journal_Title
    Electronics Letters
  • Publisher
    iet
  • ISSN
    0013-5194
  • Type

    jour

  • DOI
    10.1049/el:19981425
  • Filename
    729858
    • Link To Document
    https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=1444913