• DocumentCode
    1445185
  • Title

    Suppressed threshold voltage roll-off characteristic of 40 nm gate length ultrathin SOI MOSFET

  • Author

    Ishii, K. ; Suzuki, E. ; Kanemaru, S. ; Maeda, T. ; Nagai, K. ; Sekigawa, T.

  • Author_Institution
    Electrotech. Lab., Tsukuba, Japan
  • Volume
    34
  • Issue
    21
  • fYear
    1998
  • fDate
    10/15/1998 12:00:00 AM
  • Firstpage
    2069
  • Lastpage
    2070
  • Abstract
    The authors have experimentally demonstrated a highly suppressed threshold voltage roll-off characteristic of a 40 nm gate length ultrathin (11 nm) silicon-on-insulator n-MOSFET. It is observed that ΔVth is only 0.2 V when compared with a long gate length (150 nm) device. The marked effectiveness of an ultrathin SOI channel is experimentally confirmed to suppress the short channel effect
  • Keywords
    MOSFET; semiconductor device models; silicon-on-insulator; 40 nm; Si; gate length; suppressed threshold voltage roll-off characteristic; ultrathin SOI MOSFET; ultrathin SOI channel;
  • fLanguage
    English
  • Journal_Title
    Electronics Letters
  • Publisher
    iet
  • ISSN
    0013-5194
  • Type

    jour

  • DOI
    10.1049/el:19981433
  • Filename
    729952
    • Link To Document
    https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=1445185