Title : 
A Dual-Input Digitally Driven Doherty Amplifier Architecture for Performance Enhancement of Doherty Transmitters
         
        
            Author : 
Darraji, Ramzi ; Ghannouchi, Fadhel M. ; Hammi, Oualid
         
        
            Author_Institution : 
Dept. of Electr. & Comput. Eng., Univ. of Calgary, Calgary, AB, Canada
         
        
        
        
        
            fDate : 
5/1/2011 12:00:00 AM
         
        
        
        
            Abstract : 
In this paper, the novel architecture of a dual-input and digitally driven Doherty amplifier is proposed with the aim of improving the performance of gallium-nitride (GaN) Doherty transmitters. In this work, the power efficiency is enhanced by using digital adaptive phase alignment to compensate for performance degradation due to bias and power-dependant phase misalignment between the carrier and peaking branches. For experimental validation, the proposed dual-input digital Doherty power amplifier (PA) was implemented using a 10-W GaN transistor. Measurement results demonstrate that the dual-input Doherty prototype exhibited a power-added efficiency (PAE) higher than 50% over an 8-dB output power back-off (OPBO) range. In comparison with the conventional fully analog Doherty PA, this represents a 10% improvement in PAE over the same OPBO range. Using a one-carrier Worldwide Interoperability for Microwave Access signal with a 7-dB peak-to-average power ratio, the dual-input Doherty PA, with digital adaptive phase alignment applied at the input of its peaking path, achieved a PAE of 57% at an average output power of 37.8 dBm, along with a - 22-dBc adjacent channel power ratio (ACPR). This corresponds to an improvement of 7% in PAE and 1 dB in average output power for the same ACPR level in comparison with a conventional fully analog Doherty PA.
         
        
            Keywords : 
III-V semiconductors; amplifiers; gallium compounds; transistors; GaN; Worldwide Interoperability for Microwave Access; adjacent channel power ratio; carrier branch; digital adaptive phase alignment; dual-input digitally driven Doherty amplifier architecture; gallium-nitride Doherty transmitter; output power back-off range; peaking branch; phase misalignment; power 10 W; power efficiency; power-added efficiency; Computer architecture; Degradation; Gallium nitride; Power amplifiers; Power generation; Power measurement; Prototypes; Digital adaptive phase alignment; dual-input Doherty power amplifier (PA); gallium nitride (GaN); load modulation; power-added efficiency (PAE);
         
        
        
            Journal_Title : 
Microwave Theory and Techniques, IEEE Transactions on
         
        
        
        
        
            DOI : 
10.1109/TMTT.2011.2106137