Title :
CMOS limiting amplifier for SDH STM-16 optical receiver
Author :
Tao, Rui ; Wang, Zhi-Gong ; Xie, Ting-Ting ; Chen, Hai Tao ; Dong, Yi ; Xie, Shi-Zhong
Author_Institution :
Inst. of RF- and OE-ICs, Southeast Univ., Nanjing, China
fDate :
2/15/2001 12:00:00 AM
Abstract :
A 2.5 Gbit/s limiting amplifier is realised in a 0.35 μm CMOS technology. At a supply voltage of 5 V, the power dissipation is 225 mW. The input dynamic range is about 40 dB at a constant output voltage swing (400 mVp-p). The chip area is 1×1.1 mm2
Keywords :
CMOS analogue integrated circuits; optical fibre communication; optical limiters; optical receivers; synchronous digital hierarchy; wideband amplifiers; 0.35 micron; 2.5 Gbit/s; 225 mW; 5 V; CMOS limiting amplifier; SDH STM-16 optical receiver; constant output voltage swing; input dynamic range; optical fibre links; power dissipation; supply voltage; wideband amplifiers;
Journal_Title :
Electronics Letters
DOI :
10.1049/el:20010157
