DocumentCode :
1447798
Title :
Closing the gap between analog and digital testing
Author :
Saab, Khaled ; Hamida, N.B. ; Kaminska, Bozena
Author_Institution :
Adaptive Networks Inc., Newton, MA, USA
Volume :
20
Issue :
2
fYear :
2001
fDate :
2/1/2001 12:00:00 AM
Firstpage :
307
Lastpage :
314
Abstract :
This paper presents a highly effective method for parallel hard fault simulation and test-specification development. The proposed method formulates the fault-simulation problem as a problem of estimating the fault value based on the distance between the output parameter distribution of the fault-free and the faulty circuit. We demonstrate the effectiveness and practicality of our proposed method by showing results on different designs. This approach, extended by parametric fault testing, has been implemented as an automated tool set for integrated circuit (IC) testing
Keywords :
analogue integrated circuits; automatic testing; fault simulation; integrated circuit testing; mixed analogue-digital integrated circuits; IC testing; automated tool set; fault value; fault-simulation problem; output parameter distribution; parallel hard fault simulation; parametric fault testing; test-specification development; Automatic testing; Benchmark testing; Circuit faults; Circuit simulation; Circuit testing; Design for testability; Digital circuits; Integrated circuit testing; Signal generators; Switches;
fLanguage :
English
Journal_Title :
Computer-Aided Design of Integrated Circuits and Systems, IEEE Transactions on
Publisher :
ieee
ISSN :
0278-0070
Type :
jour
DOI :
10.1109/43.908473
Filename :
908473
Link To Document :
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