DocumentCode :
1448190
Title :
A performance evaluation of RAID architectures
Author :
Chen, Shenze ; Towsley, Don
Author_Institution :
Hewlett-Packard Co., Palo Alto, CA, USA
Volume :
45
Issue :
10
fYear :
1996
fDate :
10/1/1996 12:00:00 AM
Firstpage :
1116
Lastpage :
1130
Abstract :
In today´s computer systems, the disk I/O subsystem is often identified as the major bottleneck to system performance. One proposed solution is the so called redundant array of inexpensive disks (RAID). We examine the performance of two of the most promising RAID architectures, the mirrored array and the rotated parity array. First, we propose several scheduling policies for the mirrored array and a new data layout, group-rotate declustering, and compare their performance with each other and in combination with other data layout schemes. We observe that a policy that routes reads to the disk with the smallest number of requests provides the best performance, especially when the load on the I/O system is high. Second, through a combination of simulation and analysis, we compare the performance of this mirrored array architecture to the rotated parity array architecture. This latter study shows that: 1) given the same storage capacity (approximately double the number of disks), the mirrored array considerably outperforms the rotated parity array; and 2) given the same number of disks, the mirrored array still outperforms the rotated parity array in most cases, even for applications where I/O requests are for large amounts of data. The only exception occurs when the I/O size is very large; most of the requests are writes, and most of these writes perform full stripe write operations
Keywords :
magnetic disc storage; memory architecture; performance evaluation; scheduling; software performance evaluation; storage management; I/O requests; RAID architectures; data layout schemes; disk I/O subsystem; full stripe write operations; group-rotate declustering; mirrored array; performance evaluation; redundant array of inexpensive disks; rotated parity array; scheduling policies; storage capacity; system performance; Analytical models; Computer architecture; High performance computing; Interleaved codes; Milling machines; Performance analysis; Performance gain; Processor scheduling; Queueing analysis; System performance;
fLanguage :
English
Journal_Title :
Computers, IEEE Transactions on
Publisher :
ieee
ISSN :
0018-9340
Type :
jour
DOI :
10.1109/12.543706
Filename :
543706
Link To Document :
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