DocumentCode :
1449168
Title :
Embedded I/O PAD Circuit Design for OTP Memory Power-Switch Functionality
Author :
Shao-Chang Huang ; Ke-Horng Chen ; Wei-Yao Lin ; Zon-Lon Lee ; Kun-Wei Chang ; Hsu, Ethan ; Lee, Wei-Jen ; Lin-Fwu Chen ; Lu, Chao
Author_Institution :
Inst. of Electr. & Control Eng., Nat. Chiao Tung Univ., Hsinchu, Taiwan
Volume :
20
Issue :
4
fYear :
2012
fDate :
4/1/2012 12:00:00 AM
Firstpage :
746
Lastpage :
750
Abstract :
An additional high-voltage pad is generally applied for one-time-programming (OTP) memory product applications. This may increase the complexity of input/output (I/O) pad arrangement and the area penalty. In this paper, a novel approach of I/O circuit embedded with the power-switch function is proposed for multifunction integrations in one I/O pad. The capabilities of high-voltage programming, I/O signal handling, electrostatic discharge protection and latch-up prevention for this novel circuit are well examined from silicon verifications.
Keywords :
electrostatic discharge; integrated circuit design; integrated memory circuits; I-O signal handling; OTP memory power-switch functionality; electrostatic discharge protection; embedded I-O PAD circuit design; high-voltage pad; high-voltage programming; input/output pad arrangement complexity; latch-up prevention; multifunction integrations; one-time-programming memory product applications; silicon verifications; Electrostatic discharge; Integrated circuits; Logic gates; MOSFETs; Programming; Stress; Testing; Electrostatic discharge (ESD); Neobit; one-time programming (OTP);
fLanguage :
English
Journal_Title :
Very Large Scale Integration (VLSI) Systems, IEEE Transactions on
Publisher :
ieee
ISSN :
1063-8210
Type :
jour
DOI :
10.1109/TVLSI.2011.2106808
Filename :
5712201
Link To Document :
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