Title :
Low-power dividerless frequency synthesis using aperture phase detection
Author :
Shahani, Arvin R. ; Shaeffer, Derek K. ; Mohan, S.S. ; Samavati, Hirad ; Rategh, Hamid R. ; Del Mar Hershenson, Maria ; Xu, Min ; Yue, C. Patrick ; Eddleman, Daniel J. ; Horowitz, Mark A. ; Lee, Thomas H.
Author_Institution :
Center for Integrated Syst., Stanford Univ., CA, USA
fDate :
12/1/1998 12:00:00 AM
Abstract :
A phase-locked-loop (PLL)-based frequency synthesizer incorporating a phase detector that operates on a windowing technique eliminates the need for a frequency divider. This new loop architecture is applied to generate the 1.573-GHz local oscillator (LO) for a Global Positioning System receiver. The LO circuits in the locked mode consume only 36 mW of the total 115-mW receiver power, as a result of the power saved by eliminating the divider. The PLL´s loop bandwidth is measured to he 6 MHz, with a reference spurious level of -47 dBc. The front-end receiver, including the synthesizer, is fabricated in a 0.5-μm, triple-metal, single-poly CMOS process and operates on a 2.5-V supply
Keywords :
CMOS integrated circuits; Global Positioning System; frequency synthesizers; low-power electronics; phase detectors; phase locked loops; radio receivers; 0.5 micron; 1.573 GHz; 115 mW; 2.5 V; 6 MHz; Global Positioning System; aperture phase detector; front-end receiver; local oscillator; low power dividerless frequency synthesizer; phase locked loop; radiofrequency integrated circuit; triple-metal single-poly CMOS process; windowing technique; Apertures; Circuit synthesis; Frequency conversion; Frequency synthesizers; Global Positioning System; Laser mode locking; Local oscillators; Phase detection; Phase frequency detector; Phase locked loops;
Journal_Title :
Solid-State Circuits, IEEE Journal of
