An IC for linearizing RF power amplifiers using envelope elimination and restoration

Author

Su, David K. ; McFarland, William J.

Author_Institution

Hewlett-Packard Co., Palo Alto, CA, USA

Volume

33

Issue

12

fYear

1998

fDate

12/1/1998 12:00:00 AM

Firstpage

2252

Lastpage

2258

Abstract

This paper presents a monolithic CMOS implementation of an envelope elimination and restoration linearization system that improves the linearity of efficient radio-frequency power amplifiers. The linearization IC, which occupies 4.3 mm² when implemented in a 0.8-μm CMOS technology, consists of a limiter, envelope detectors, and delta-modulated switching power supply. This circuit was used to linearize advanced mobile phone system cellular power amplifiers transmitting North American digital cellular (NADC) waveforms. Measurements show that the linearized outputs meet the spectral mask and phase distortion requirements of NADC. The linearization system can improve the overall efficiency from 36 to 49%, while increasing the maximum linear output power from 26.5 to 29.5 dBm

Keywords

CMOS analogue integrated circuits; UHF integrated circuits; UHF power amplifiers; cellular radio; delta modulation; electric distortion; limiters; linearisation techniques; 0.8 micron; 49 percent; CMOS implementation; North American digital cellular waveforms; RF power amplifiers; cellular power amplifiers; delta-modulated switching power supply; envelope elimination; envelope restoration; limiter; linearization system; maximum linear output power; mobile phone system; phase distortion; spectral mask; CMOS integrated circuits; CMOS technology; Envelope detectors; Linearity; Power amplifiers; Power supplies; Power system restoration; Radio frequency; Radiofrequency amplifiers; Radiofrequency integrated circuits;

fLanguage

English

Journal_Title

Solid-State Circuits, IEEE Journal of

Publisher

ieee

ISSN

0018-9200

Type

jour

DOI

10.1109/4.735710

Filename

735710