Analysis of integral non-linearity errors in two-step analogue-to-digital converters

A new method for modelling and analysis of non-linearity errors caused by the capacitor mismatches and op-amp non-idealities in two-step analogue-to-digital converters (ADCs) is presented. Analytical formulas for estimation of the ADC integral non-linearity (INL) are derived. Using the proposed method, the ADC INL can be calculated in terms of the capacitor mismatches standard deviations. Therefore time-consuming Monte Carlo simulations which are conventionally used to evaluate the effect of random capacitor mismatches on the ADC linearity can be avoided. The effect of op-amp non-idealities, which are frequently examined by the circuit-level simulations, can also be evaluated using the derived model for the INL in terms of the op-amp DC gain and non-linearity. Accuracy of the proposed model is validated by the system and circuit-level Monte Carlo simulations. By using the proposed model, static performance of the conventional restoring (CR) and redundant signed digit (RSD) converters in the presence of mentioned errors are compared.