DocumentCode :
1450449
Title :
187 MHz Subthreshold-Supply Charge-Recovery FIR
Author :
Ma, Wei-Hsiang ; Kao, Jerry C. ; Sathe, Visvesh S. ; Papaefthymiou, Marios C.
Author_Institution :
Univ. of Michigan, Ann Arbor, MI, USA
Volume :
45
Issue :
4
fYear :
2010
fDate :
4/1/2010 12:00:00 AM
Firstpage :
793
Lastpage :
803
Abstract :
This paper presents a finite impulse response (FIR) filter chip that relies on a charge-recovery logic family to achieve multi-MHz clock frequencies with subthreshold DC supply levels. Fabricated in a 0.13 ¿m CMOS process with Vth,nmos = 0.40 V, the FIR operates with a two-phase power-clock in the 5 MHz-187 MHz range and with DC supplies in the 0.16 V-0.36 V range. Using a single DC supply, the chip achieves its most energy-efficient operating point when resonating at 20 MHz with a 0.27 V supply. Recovering 89 % of the energy supplied to its 57 pF per-phase load, it consumes 15.57 pj per cycle and yields 17.37 nW/Tap/MHz/InBit/ CoeffBit. Using two subthreshold DC supplies at 20 MHz, energy per cycle can be further reduced by 17.1 %, yielding 14.40 nW/Tap/ MHz/InBit/CoeffBit.
Keywords :
CMOS logic circuits; FIR filters; clocks; low-power electronics; CMOS process; DC supply; charge-recovery logic family; finite impulse response filter chip; frequency 5 MHz to 187 MHz; size 0.13 mum; two-phase power-clock; voltage 0.16 V to 0.36 V; voltage 0.40 V; Boosting; Circuit synthesis; Circuit testing; Clocks; Energy consumption; Energy efficiency; Finite impulse response filter; Frequency; Power supplies; Voltage; Digital signal processing; low-power VLSI;
fLanguage :
English
Journal_Title :
Solid-State Circuits, IEEE Journal of
Publisher :
ieee
ISSN :
0018-9200
Type :
jour
DOI :
10.1109/JSSC.2010.2042247
Filename :
5437476
Link To Document :
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