FPGA implementation of trellis coded modulation decode on SDR communication system

Author

Yi Hua Chen ; Mei-Lin Su ; Yi Fan Ni

Author_Institution

Oriental Inst. of Technol., Inst. of Inf. & Commun. Eng., Taipei, Taiwan

Volume

1

fYear

2014

fDate

26-28 April 2014

Firstpage

89

Lastpage

93

Abstract

This study investigates the constellation mapping of the 3-bit soft-decision Viterbi decoder and the decoding system of the Viterbi decoder for trellis-coded modulation (TCM) decoding. By referring to the IESS-310 TCM standard coding scheme, LabVIEW FPGA is employed to design the corresponding decoding circuits of the 3-bit soft-decision TCM Viterbi decoder in a software-defined radio (SDR) system [1]. Finally, the study employs TCM coding and decoding circuits designed by using LabVIEW FPGA to simulate the error rate curve in the AWGN channel. The simulation results surpass the bit error rate (BER) curves of QPSK and 8PSK and the IESS-310 standard.

Keywords

AWGN channels; Viterbi decoding; error statistics; field programmable gate arrays; quadrature phase shift keying; software radio; trellis coded modulation; virtual instrumentation; 8PSK; AWGN channel; BER; IESS-310 TCM standard coding scheme; LabVIEW FPGA; QPSK; SDR communication system; TCM decoding circuit; bit error rate; constellation mapping; error rate curve simulation; soft-decision Viterbi decoder; software-defined radio; trellis-coded modulation; word length 3 bit; Bit error rate; Convolutional codes; Encoding; Maximum likelihood decoding; Registers; Viterbi algorithm; LabVIEW FPGA; SDR; Soft Decision; Trellis-coded modulation(TCM); Viterbi Decoder;

fLanguage

English

Publisher

ieee

Conference_Titel

Information Science, Electronics and Electrical Engineering (ISEEE), 2014 International Conference on

Conference_Location

Sapporo

Print_ISBN

978-1-4799-3196-5

Type

conf

DOI

10.1109/InfoSEEE.2014.6948074

Filename

6948074