DocumentCode
1451217
Title
Partitioning-based algorithm for synthesis of low-power combinational circuits
Author
Choi, Ick-Sung ; Kim, Hyoung ; Seo, Dong-Wook ; Hwang, Sun-Young
Author_Institution
Dept. of Electron. Eng., Sogang Univ., Seoul, South Korea
Volume
32
Issue
22
fYear
1996
fDate
10/24/1996 12:00:00 AM
Firstpage
2041
Lastpage
2043
Abstract
The authors propose a synthesis algorithm for the low-power design of combinational circuits. Experimental results show the effectiveness of the proposed algorithm by generating a restructured circuit with low power consumption
Keywords
circuit CAD; combinational circuits; logic CAD; logic partitioning; low power consumption; low-power combinational circuits; low-power design; partitioning-based algorithm; restructured circuit; synthesis algorithm;
fLanguage
English
Journal_Title
Electronics Letters
Publisher
iet
ISSN
0013-5194
Type
jour
DOI
10.1049/el:19961373
Filename
543802
Link To Document