• DocumentCode
    1451607
  • Title

    Fault analysis for networks with concurrent error detection

  • Author

    Bolchini, Cristiana ; Salice, Fabio ; Sciuto, Donatella

  • Author_Institution
    Dipt. di Elettronica, Politecnico di Milano, Italy
  • Volume
    15
  • Issue
    4
  • fYear
    1998
  • Firstpage
    66
  • Lastpage
    74
  • Abstract
    The authors propose an approach for fault analysis and simulation of networks designed to have concurrent detection properties. The analysis characterizes all faults that may affect a device and determines the coverage, extracting test vectors and other parameters for evaluating device quality
  • Keywords
    error detection; fault location; integrated circuit testing; device quality; fault analysis; networks with concurrent error detection; test vectors; Arithmetic; Circuit faults; Circuit synthesis; Computer errors; Electrical fault detection; Encoding; Fault detection; Logic; Network synthesis; Testing;
  • fLanguage
    English
  • Journal_Title
    Design & Test of Computers, IEEE
  • Publisher
    ieee
  • ISSN
    0740-7475
  • Type

    jour

  • DOI
    10.1109/54.735929
  • Filename
    735929
    • Link To Document
    https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=1451607