A low-power CMOS super-regenerative receiver at 1 GHz

Author

Vouilloz, Alexandre ; Declercq, Michel ; Dehollain, Catherine

Author_Institution

Electron. Lab., Swiss Federal Inst. of Technol., Lausanne, Switzerland

Volume

36

Issue

3

fYear

2001

fDate

3/1/2001 12:00:00 AM

Firstpage

440

Lastpage

451

Abstract

A low-power and low-voltage super-regenerative receiver operating at 1 GHz and implemented in a 0.35-μm CMOS process is described. The receiver includes a low-noise amplifier, a super-regenerative oscillator, an envelope detector, an AGC circuit with sample/hold function, and a baseband amplifier. The die surface is equal to 0.25 mm ². The power consumption is less than 1.2 mW at V_DD=1.5 V. A 100-kHz sawtooth quench signal is used to achieve a rejection of -36 dB at 500 KHz from the central frequency

Keywords

CMOS analogue integrated circuits; UHF integrated circuits; field effect MMIC; low-power electronics; microwave receivers; sample and hold circuits; 0.35 micron; 1 GHz; 1.5 V; 100 kHz; AGC circuit; baseband amplifier; die surface; envelope detector; low-noise amplifier; low-power CMOS; power consumption; sample/hold function; sawtooth quench signal; super-regenerative receiver; BiCMOS integrated circuits; CMOS process; CMOS technology; Costs; Energy consumption; Feedback loop; Low-noise amplifiers; Oscillators; Radio frequency; Radiofrequency amplifiers;

fLanguage

English

Journal_Title

Solid-State Circuits, IEEE Journal of

Publisher

ieee

ISSN

0018-9200

Type

jour

DOI

10.1109/4.910483

Filename

910483