DocumentCode :
1453883
Title :
An Ultralow-Resistance Ultrashallow Metallic Source/Drain Contact Scheme for III–V NMOS
Author :
Oxland, R. ; Chang, S.W. ; Li, Xu ; Wang, S.W. ; Radhakrishnan, G. ; Priyantha, W. ; van Dal, M.J.H. ; Hsieh, C.H. ; Vellianitis, G. ; Doornbos, G. ; Bhuwalka, K. ; Duriez, B. ; Thayne, I. ; Droopad, R. ; Passlack, M. ; Diaz, C.H. ; Sun, Y.C.
Author_Institution :
TSMC R&D Eur. B.V., Leuven, Belgium
Volume :
33
Issue :
4
fYear :
2012
fDate :
4/1/2012 12:00:00 AM
Firstpage :
501
Lastpage :
503
Abstract :
We report an ultrashallow metallic source/drain (S/D) contact scheme for fully self-aligned III-V NMOS with specific contact resistivity and sheet resistance which, for the first time, demonstrate performance metrics that may be compatible with the ITRS Rext requirements for 12-nm technology generation device pitch. The record specific contact resistivity between the contact pad and metallic S/D of ρc = 2.7 ·10-9 Ω·cm2 has been demonstrated for 10 nm undoped InAs channels by forming an ultrashallow crystalline ternary NiInAs phase with Rsh = 97 Ω/sq for a junction depth of 7 nm. The junction depth of the S/D scheme is highly controllable and atomically abrupt.
Keywords :
III-V semiconductors; MOS integrated circuits; contact resistance; indium compounds; nickel compounds; ITRS requirements; NiInAs; contact pad; fully self-aligned III-V NMOS; performance metrics; sheet resistance; size 12 nm; specific contact resistivity; technology generation device pitch; ultralow-resistance ultrashallow metallic source-drain contact scheme; ultrashallow crystalline ternary phase; Conductivity; Junctions; MOSFETs; Nickel; Temperature measurement; Transmission line measurements; High-mobility channel; III–V semiconductor materials; MOSFETs; semiconductor–metal interfaces;
fLanguage :
English
Journal_Title :
Electron Device Letters, IEEE
Publisher :
ieee
ISSN :
0741-3106
Type :
jour
DOI :
10.1109/LED.2012.2185919
Filename :
6155729
Link To Document :
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