Title :
Modeling of mismatch effect in submicron MOSFETs based on BSIM3 model and parametric tests
Author :
Zhang, Q. ; Liou, J.J. ; McMacken, J. ; Thomson, J. ; Layman, P.
Author_Institution :
Sch. of Electr. Eng. & Comput. Sci., Univ. of Central Florida, Orlando, FL, USA
fDate :
3/1/2001 12:00:00 AM
Abstract :
Mismatch between identically designed MOS transistors plays an important role in the performance of analog circuits. This paper reports a MOS transistor mismatch model applicable for submicron CMOS technology and developed based on the industry standard BSIM3v3 model. A quick way to estimate drain current mismatch based on parametric test data was also suggested.
Keywords :
MOSFET; semiconductor device models; semiconductor device testing; BSIM3v3 model; CMOS technology; analog circuit; drain current; mismatch effect; parametric testing; submicron MOSFET; Analog circuits; CMOS technology; Circuit testing; Helium; MOSFETs; Semiconductor device measurement; Semiconductor device modeling; Semiconductor process modeling; Standards development; Threshold voltage;
Journal_Title :
Electron Device Letters, IEEE
