An SOI LDMOS/CMOS/BJT technology for integrated power amplifiers used in wireless transceiver applications

Author

Kumar, M. ; Tan, Y. ; Sin, J.K.O. ; Cai, J.

Author_Institution

Dept. of Electr. & Electron. Eng., Hong Kong Univ. of Sci. & Technol., China

Volume

22

Issue

3

fYear

2001

fDate

3/1/2001 12:00:00 AM

Firstpage

136

Lastpage

138

Abstract

This paper describes a SOI LDMOS/CMOS/BJT technology that can be used in portable wireless communication applications. This technology allows the complete integration of the front-end circuits with the baseband circuits for low-cost/low-power/high-volume single-chip transceiver implementation. The LDMOS transistors (0.35 μm channel length, 3.8 μm drift length, 4.5 GHz f_T and 21 V breakdown voltage), CMOS transistors (1.5 μm channel length, 0.8/-1.2 V threshold voltage), lateral NPN transistor (18 V BV/sub CBO/ and h/sub FE/ of 20), and high Q-factor (up to 6.1 at 900 MHz and 7.2 at 1.8 GHz) on-chip inductors are fabricated. A fully-functional high performance integrated power amplifier for 900 MHz wireless transceiver application is also demonstrated.

Keywords

MOSFET; UHF bipolar transistors; UHF field effect transistors; UHF power amplifiers; bipolar transistors; inductors; low-power electronics; silicon-on-insulator; transceivers; 900 MHz; CMOS transistor; LDMOS transistor; Q-factor; SOI technology; baseband circuit; front-end circuit; integrated power amplifier; lateral BJT; low-power single-chip transceiver; on-chip inductor; portable wireless communication; Baseband; CMOS technology; Inductors; Integrated circuit technology; Iron; Power amplifiers; Q factor; Threshold voltage; Transceivers; Wireless communication;

fLanguage

English

Journal_Title

Electron Device Letters, IEEE

Publisher

ieee

ISSN

0741-3106

Type

jour

DOI

10.1109/55.910621

Filename

910621