DocumentCode

1454792

Title

A 0.8–2 GHz Fully-Integrated QPLL-Timed Direct-RF-Sampling Bandpass $\\Sigma \\Delta$ ADC in 0.13 $\\</h1></div></div> </li> <li class='list-group-item border-0 py-3 px-0'> <div class='row g-0 align-items-center mb-2'><div class='col-12 col-md-3 fullRecLabelEnglish fw-bold mb-2 mb-md-0'><span class='text-muted small'>Author</span></div><div class='col-12 col-md-9 leftDirection leftAlign'><h2 class='mb-0 fw-semibold'>Gupta, Subhanshu ; Gangopadhyay, Daibashish ; Lakdawala, Hasnain ; Rudell, Jacques C. ; Allstot, David J.</h2></div></div> </li> <li class='list-group-item border-0 py-3 px-0'> <div class='row g-0 align-items-center mb-2'><div class='col-12 col-md-3 fullRecLabelEnglish fw-bold mb-2 mb-md-0'><span class='text-muted small'>Author_Institution</span></div><div class='col-12 col-md-9 leftDirection leftAlign'>Dept. of Electr. Eng., Univ. of Washington, Seattle, WA, USA</div></div> </li> <li class='list-group-item border-0 py-3 px-0'> <div class='row g-0 align-items-center mb-2'><div class='col-12 col-md-3 fullRecLabelEnglish fw-bold mb-2 mb-md-0'><span class='text-muted small'>Volume</span></div><div class='col-12 col-md-9 leftDirection leftAlign'>47</div></div> </li> <li class='list-group-item border-0 py-3 px-0'> <div class='row g-0 align-items-center mb-2'><div class='col-12 col-md-3 fullRecLabelEnglish fw-bold mb-2 mb-md-0'><span class='text-muted small'>Issue</span></div><div class='col-12 col-md-9 leftDirection leftAlign'>5</div></div> </li> <li class='list-group-item border-0 py-3 px-0'> <div class='row g-0 align-items-center mb-2'><div class='col-12 col-md-3 fullRecLabelEnglish fw-bold mb-2 mb-md-0'><span class='text-muted small'>fYear</span></div><div class='col-12 col-md-9 leftDirection leftAlign'>2012</div></div> </li> <li class='list-group-item border-0 py-3 px-0'> <div class='row g-0 align-items-center mb-2'><div class='col-12 col-md-3 fullRecLabelEnglish fw-bold mb-2 mb-md-0'><span class='text-muted small'>fDate</span></div><div class='col-12 col-md-9 leftDirection leftAlign'>5/1/2012 12:00:00 AM</div></div> </li> <li class='list-group-item border-0 py-3 px-0'> <div class='row g-0 align-items-center mb-2'><div class='col-12 col-md-3 fullRecLabelEnglish fw-bold mb-2 mb-md-0'><span class='text-muted small'>Firstpage</span></div><div class='col-12 col-md-9 leftDirection leftAlign'>1141</div></div> </li> <li class='list-group-item border-0 py-3 px-0'> <div class='row g-0 align-items-center mb-2'><div class='col-12 col-md-3 fullRecLabelEnglish fw-bold mb-2 mb-md-0'><span class='text-muted small'>Lastpage</span></div><div class='col-12 col-md-9 leftDirection leftAlign'>1153</div></div> </li> <li class='list-group-item border-0 py-3 px-0'> <div class='row g-0 align-items-center mb-2'><div class='col-12 col-md-3 fullRecLabelEnglish fw-bold mb-2 mb-md-0'><span class='text-muted small'>Abstract</span></div><div class='col-12 col-md-9 leftDirection leftAlign'>A reconfigurable bandpass continuous-time ΣΔ RF ADC tunable over the 0.8-2 GHz frequency range is presented. System- and circuit-level innovations provide low power consumption and reduced circuit complexity. The proposed architecture operates in both the first- and second-Nyquist zones to enable a wide tuning range from a fixed sampling frequency of 3.2 GHz. A fully-integrated on-chip quadrature phase-locked loop (QPLL) allows quadrature phase synchronization between a raised-cosine DAC and a quantizer. Implemented in 0.13 μm CMOS the fully-integrated prototype achieves SNDR values of 50 dB, 46 dB, and 40 dB over a 1 MHz bandwidth at 796.5 MHz, 1.001 GHz and 1.924 GHz carrier frequencies, respectively, with a total power consumption of 41 mW. The measured phase noise of the QPLL is -113 dBc/Hz at an offset frequency of 1 MHz and the reference spur is - 74.5 dBc. The RMS period jitter is 1.38 ps at 3.2 GHz.</div></div> </li> <li class='list-group-item border-0 py-3 px-0'> <div class='row g-0 align-items-center mb-2'><div class='col-12 col-md-3 fullRecLabelEnglish fw-bold mb-2 mb-md-0'><span class='text-muted small'>Keywords</span></div><div class='col-12 col-md-9 leftDirection leftAlign'>CMOS integrated circuits; UHF integrated circuits; analogue-digital conversion; low-power electronics; microwave integrated circuits; phase locked loops; CMOS; bandpass ΣΔ ADC; circuit complexity reduction; circuit-level innovations; first-Nyquist zones; frequency 0.8 GHz to 2 GHz; frequency 1 MHz; frequency 3.2 GHz; frequency 796.5 MHz; fully-integrated QPLL-timed direct-RF-sampling; low power consumption; on-chip quadrature phase-locked loop; power 41 mW; quadrature phase synchronization; quantizer; raised-cosine DAC; reconfigurable bandpass continuous-time ΣΔ RF ADC; second-Nyquist zones; size 0.13 mum; system-level innovations; time 1.38 ps; CMOS integrated circuits; Dynamic range; Jitter; Noise; Radio frequency; Resonant frequency; Sensitivity; Charge pump; SDR; direct sampling RF; direct-RF sigma-delta ADC; finite-impulse response DAC; harmonic-rejection injection-locked oscillator; integer-N phase-locked loop; narrowband programmable LNA; reconfigurable; reference spur;</div></div> </li> <li class='list-group-item border-0 py-3 px-0'> <div class='row g-0 align-items-center mb-2'><div class='col-12 col-md-3 fullRecLabelEnglish fw-bold mb-2 mb-md-0'><span class='text-muted small'>fLanguage</span></div><div class='col-12 col-md-9 leftDirection leftAlign'>English</div></div> </li> <li class='list-group-item border-0 py-3 px-0'> <div class='row g-0 align-items-center mb-2'><div class='col-12 col-md-3 fullRecLabelEnglish fw-bold mb-2 mb-md-0'><span class='text-muted small'>Journal_Title</span></div><div class='col-12 col-md-9 leftDirection leftAlign'>Solid-State Circuits, IEEE Journal of</div></div> </li> <li class='list-group-item border-0 py-3 px-0'> <div class='row g-0 align-items-center mb-2'><div class='col-12 col-md-3 fullRecLabelEnglish fw-bold mb-2 mb-md-0'><span class='text-muted small'>Publisher</span></div><div class='col-12 col-md-9 leftDirection leftAlign'>ieee</div></div> </li> <li class='list-group-item border-0 py-3 px-0'> <div class='row g-0 align-items-center mb-2'><div class='col-12 col-md-3 fullRecLabelEnglish fw-bold mb-2 mb-md-0'><span class='text-muted small'>ISSN</span></div><div class='col-12 col-md-9 leftDirection leftAlign'>0018-9200</div></div> </li> <li class='list-group-item border-0 py-3 px-0'> <div class='row g-0 align-items-center mb-2'><div class='col-12 col-md-3 fullRecLabelEnglish fw-bold mb-2 mb-md-0'><span class='text-muted small'>Type</span></div><div class='col-12 col-md-9 leftDirection leftAlign'><h2 class='mb-0 fw-semibold'>jour</h2></div></div> </li> <li class='list-group-item border-0 py-3 px-0'> <div class='row g-0 align-items-center mb-2'><div class='col-12 col-md-3 fullRecLabelEnglish fw-bold mb-2 mb-md-0'><span class='text-muted small'>DOI</span></div><div class='col-12 col-md-9 leftDirection leftAlign'>10.1109/JSSC.2012.2185530</div></div> </li> <li class='list-group-item border-0 py-3 px-0'> <div class='row g-0 align-items-center mb-2'><div class='col-12 col-md-3 fullRecLabelEnglish fw-bold mb-2 mb-md-0'><span class='text-muted small'>Filename</span></div><div class='col-12 col-md-9 leftDirection leftAlign'>6156479</div></div> </li> <div class='list-group-item border-0 py-3 px-0'> <div class='row g-0 align-items-center'><div class='col-12 col-md-3 fw-bold mb-2 mb-md-0'><span class='text-muted small'>Link To Document</span></div><div class='col-12 col-md-9 leftDirection leftAlign'><a class='text-break' href='https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=1454792' target='_blank' rel=$ https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=1454792