• DocumentCode
    1454878
  • Title

    Automata-based symbolic scheduling for looping DFGs

  • Author

    Haynal, Steve ; Brewer, Forrest

  • Author_Institution
    Strategic CAD Lab., Intel Corp., Hillsboro, OR, USA
  • Volume
    50
  • Issue
    3
  • fYear
    2001
  • fDate
    3/1/2001 12:00:00 AM
  • Firstpage
    250
  • Lastpage
    267
  • Abstract
    This paper presents an exact technique for scheduling looping data-flow graphs that implicitly supports functional pipelining and loop winding. Automata-based symbolic modeling provides efficient representation of all causal executions of a given behavioral description subject to finite state bounds. Since a complete set of scheduling solutions is found, further incremental refinements, such as sequential interface protocol constraints, can be easily accommodated. Efficiency In the implementation Is maintained by careful formulation of the automata and by judicious exploration techniques. Results are presented for traditionally referenced benchmarks, several large synthetic benchmarks, and a practical industrial example
  • Keywords
    automata theory; data flow graphs; pipeline processing; processor scheduling; data-flow graphs; finite state bounds; functional pipelining; incremental refinements; loop winding; looping DFGs; scheduling; Automata; Boolean functions; Data structures; High level synthesis; Job shop scheduling; Microprocessors; Pipeline processing; Protocols; Refining; Timing;
  • fLanguage
    English
  • Journal_Title
    Computers, IEEE Transactions on
  • Publisher
    ieee
  • ISSN
    0018-9340
  • Type

    jour

  • DOI
    10.1109/12.910815
  • Filename
    910815