Title :
Sorting by parallel insertion on a one-dimensional subbus array
Author :
Fix, James D. ; Ladner, Richard E.
Author_Institution :
Dept. of Comput. Sci. & Eng., Washington Univ., Seattle, WA, USA
fDate :
11/1/1998 12:00:00 AM
Abstract :
We consider the problem of sorting on a one-dimensional subbus array of processors, an architecture that communicates using a segmentable bus. The subbus broadcast operation makes possible a new class of parallel sorting algorithms whose complexity we analyze with the parallel insertion model. We give per-input lower bounds for sorting in the parallel insertion model and demonstrate sorting strategies that are optimal by matching those lower bounds. For each of our sorting strategies, we discuss the issues involved in implementing them on subbus machines. Finally, we empirically evaluate the performance of our sorting strategies by applying them to shearsort, a common two-dimensional mesh sorting algorithm. Our results suggest that for sorting the subbus broadcast capability gives at most a slight advantage over using only nearest neighbor communication
Keywords :
computational complexity; parallel algorithms; parallel architectures; reconfigurable architectures; sorting; complexity; mesh sorting algorithm; nearest neighbor communication; one-dimensional subbus array; parallel insertion; parallel insertion model; parallel sorting algorithms; performance; segmentable bus; sorting; Algorithm design and analysis; Analytical models; Broadcasting; Communication system control; Concurrent computing; Nearest neighbor searches; Parallel algorithms; Performance analysis; Process control; Sorting;
Journal_Title :
Computers, IEEE Transactions on