• DocumentCode
    1455794
  • Title

    A layout approach to monolithic microwave IC

  • Author

    Nagao, Akira ; Shirakawa, Isao ; Kambe, Takashi

  • Author_Institution
    Syst. Dev. Centre, Sharp Corp., Nara, Japan
  • Volume
    17
  • Issue
    12
  • fYear
    1998
  • fDate
    12/1/1998 12:00:00 AM
  • Firstpage
    1262
  • Lastpage
    1272
  • Abstract
    A layout approach for monolithic microwave integrated circuits (MMICs) is described, in which layout elements are transistors, inductors, capacitors, resistors, coplanar waveguides, etc., implemented in a GaAs fabrication process. The layout issue typical of such MMIC´s consists essentially in how to realize a single-layered placement of different shapes of layout elements under a variety of spacing and orienting constraints as well as shape variations. In this paper, the interconnection requirements among the elements are represented by a graph, to which a planarization algorithm is applied. On the basis of the planarization result, the physical placement is first constructed with the use of a merging scheme and then refined iteratively by means of a new rectangle-packing algorithm. Experimental results are also shown to demonstrate the practicability of the described layout approach
  • Keywords
    III-V semiconductors; MMIC; gallium arsenide; graph theory; integrated circuit layout; GaAs; GaAs MMIC layout; graph partitioning; interconnection; iterative refinement; merging; monolithic microwave integrated circuit; planarization; rectangle packing algorithm; single layered placement; Capacitors; Inductors; Integrated circuit layout; Iterative algorithms; MMICs; Microwave integrated circuits; Microwave transistors; Monolithic integrated circuits; Planarization; Shape;
  • fLanguage
    English
  • Journal_Title
    Computer-Aided Design of Integrated Circuits and Systems, IEEE Transactions on
  • Publisher
    ieee
  • ISSN
    0278-0070
  • Type

    jour

  • DOI
    10.1109/43.736566
  • Filename
    736566