DocumentCode

1456563

Title

Vertical Si-Nanowire $n$ -Type Tunneling FETs With Low Subthreshold Swing ( $\\leq \\hbox {50} \\hbox {mV/decad</h1></div></div> </li> <li class='list-group-item border-0 py-3 px-0'> <div class='row g-0 align-items-center mb-2'><div class='col-12 col-md-3 fullRecLabelEnglish fw-bold mb-2 mb-md-0'><span class='text-muted small'>Author</span></div><div class='col-12 col-md-9 leftDirection leftAlign'><h2 class='mb-0 fw-semibold'>Gandhi, Ramanathan ; Chen, Zhixian ; Singh, Navab ; Banerjee, Kaustav ; Lee, Sungjoo</h2></div></div> </li> <li class='list-group-item border-0 py-3 px-0'> <div class='row g-0 align-items-center mb-2'><div class='col-12 col-md-3 fullRecLabelEnglish fw-bold mb-2 mb-md-0'><span class='text-muted small'>Author_Institution</span></div><div class='col-12 col-md-9 leftDirection leftAlign'>Inst. of Microelectron., Agency for Sci., Technol. & Res., A*STAR, Singapore, Singapore</div></div> </li> <li class='list-group-item border-0 py-3 px-0'> <div class='row g-0 align-items-center mb-2'><div class='col-12 col-md-3 fullRecLabelEnglish fw-bold mb-2 mb-md-0'><span class='text-muted small'>Volume</span></div><div class='col-12 col-md-9 leftDirection leftAlign'>32</div></div> </li> <li class='list-group-item border-0 py-3 px-0'> <div class='row g-0 align-items-center mb-2'><div class='col-12 col-md-3 fullRecLabelEnglish fw-bold mb-2 mb-md-0'><span class='text-muted small'>Issue</span></div><div class='col-12 col-md-9 leftDirection leftAlign'>4</div></div> </li> <li class='list-group-item border-0 py-3 px-0'> <div class='row g-0 align-items-center mb-2'><div class='col-12 col-md-3 fullRecLabelEnglish fw-bold mb-2 mb-md-0'><span class='text-muted small'>fYear</span></div><div class='col-12 col-md-9 leftDirection leftAlign'>2011</div></div> </li> <li class='list-group-item border-0 py-3 px-0'> <div class='row g-0 align-items-center mb-2'><div class='col-12 col-md-3 fullRecLabelEnglish fw-bold mb-2 mb-md-0'><span class='text-muted small'>fDate</span></div><div class='col-12 col-md-9 leftDirection leftAlign'>4/1/2011 12:00:00 AM</div></div> </li> <li class='list-group-item border-0 py-3 px-0'> <div class='row g-0 align-items-center mb-2'><div class='col-12 col-md-3 fullRecLabelEnglish fw-bold mb-2 mb-md-0'><span class='text-muted small'>Firstpage</span></div><div class='col-12 col-md-9 leftDirection leftAlign'>437</div></div> </li> <li class='list-group-item border-0 py-3 px-0'> <div class='row g-0 align-items-center mb-2'><div class='col-12 col-md-3 fullRecLabelEnglish fw-bold mb-2 mb-md-0'><span class='text-muted small'>Lastpage</span></div><div class='col-12 col-md-9 leftDirection leftAlign'>439</div></div> </li> <li class='list-group-item border-0 py-3 px-0'> <div class='row g-0 align-items-center mb-2'><div class='col-12 col-md-3 fullRecLabelEnglish fw-bold mb-2 mb-md-0'><span class='text-muted small'>Abstract</span></div><div class='col-12 col-md-9 leftDirection leftAlign'>This letter presents a Si nanowire based tunneling field-effect transistor (TFET) using a CMOS-compatible vertical gate-all-around structure. By minimizing the thermal budget with low-temperature dopant-segregated silicidation for the source-side dopant activation, excellent TFET characteristics were obtained. We have demonstrated for the first time the lowest ever reported subthreshold swing (SS) of 30 mV/decade at room temperature. In addition, we reported a very convincing SS of 50 mV/decade for close to three decades of drain current. Moreover, our TFET device exhibits excellent characteristics without ambipolar behavior and with high I<sub>on</sub>/I<sub>off</sub> ratio (10<sup>5</sup>), as well as low Drain-Induced Barrier Lowering of 70 mV/V.</div></div> </li> <li class='list-group-item border-0 py-3 px-0'> <div class='row g-0 align-items-center mb-2'><div class='col-12 col-md-3 fullRecLabelEnglish fw-bold mb-2 mb-md-0'><span class='text-muted small'>Keywords</span></div><div class='col-12 col-md-9 leftDirection leftAlign'>CMOS integrated circuits; MOSFET; elemental semiconductors; field effect transistors; nanowires; silicon; tunnel transistors; CMOS-compatible vertical gate-all-around structure; Si; TFET; drain current; drain-induced barrier lowering; low subthreshold swing; low-temperature dopant-segregated silicidation; source-side dopant activation; temperature 293 K to 298 K; thermal budget; tunneling field-effect transistor; vertical nanowire n-type tunneling FET; FETs; Logic gates; MOSFET circuits; Silicon; Tunneling; CMOS technology; gate-all-around (GAA); subthreshold swing (SS); top–down; tunneling field-effect transistor (TFET); vertical silicon nanowire (NW) (SiNW);</div></div> </li> <li class='list-group-item border-0 py-3 px-0'> <div class='row g-0 align-items-center mb-2'><div class='col-12 col-md-3 fullRecLabelEnglish fw-bold mb-2 mb-md-0'><span class='text-muted small'>fLanguage</span></div><div class='col-12 col-md-9 leftDirection leftAlign'>English</div></div> </li> <li class='list-group-item border-0 py-3 px-0'> <div class='row g-0 align-items-center mb-2'><div class='col-12 col-md-3 fullRecLabelEnglish fw-bold mb-2 mb-md-0'><span class='text-muted small'>Journal_Title</span></div><div class='col-12 col-md-9 leftDirection leftAlign'>Electron Device Letters, IEEE</div></div> </li> <li class='list-group-item border-0 py-3 px-0'> <div class='row g-0 align-items-center mb-2'><div class='col-12 col-md-3 fullRecLabelEnglish fw-bold mb-2 mb-md-0'><span class='text-muted small'>Publisher</span></div><div class='col-12 col-md-9 leftDirection leftAlign'>ieee</div></div> </li> <li class='list-group-item border-0 py-3 px-0'> <div class='row g-0 align-items-center mb-2'><div class='col-12 col-md-3 fullRecLabelEnglish fw-bold mb-2 mb-md-0'><span class='text-muted small'>ISSN</span></div><div class='col-12 col-md-9 leftDirection leftAlign'>0741-3106</div></div> </li> <li class='list-group-item border-0 py-3 px-0'> <div class='row g-0 align-items-center mb-2'><div class='col-12 col-md-3 fullRecLabelEnglish fw-bold mb-2 mb-md-0'><span class='text-muted small'>Type</span></div><div class='col-12 col-md-9 leftDirection leftAlign'><h2 class='mb-0 fw-semibold'>jour</h2></div></div> </li> <li class='list-group-item border-0 py-3 px-0'> <div class='row g-0 align-items-center mb-2'><div class='col-12 col-md-3 fullRecLabelEnglish fw-bold mb-2 mb-md-0'><span class='text-muted small'>DOI</span></div><div class='col-12 col-md-9 leftDirection leftAlign'>10.1109/LED.2011.2106757</div></div> </li> <li class='list-group-item border-0 py-3 px-0'> <div class='row g-0 align-items-center mb-2'><div class='col-12 col-md-3 fullRecLabelEnglish fw-bold mb-2 mb-md-0'><span class='text-muted small'>Filename</span></div><div class='col-12 col-md-9 leftDirection leftAlign'>5719152</div></div> </li> <div class='list-group-item border-0 py-3 px-0'> <div class='row g-0 align-items-center'><div class='col-12 col-md-3 fw-bold mb-2 mb-md-0'><span class='text-muted small'>Link To Document</span></div><div class='col-12 col-md-9 leftDirection leftAlign'><a class='text-break' href='https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=1456563' target='_blank' rel=$ https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=1456563