Title :
Density-of-State and Trap Modeling of Low-Voltage Electric-Double-Layer TFTs
Author :
Dai, Mingzhi ; Jiang, Jie ; Yang, Yue ; Wu, Guodong ; Wan, Qing
Author_Institution :
Ningbo Inst. of Mater. Technol. & Eng., Chinese Acad. of Sci., Ningbo, China
fDate :
4/1/2011 12:00:00 AM
Abstract :
The modeling of low-voltage oxide-based electric-double-layer (EDL) thin-film transistors (TFTs) is reported. A simple model with a constant mobility (i.e., 30 cm2/V · s), interface trap density (i.e., 1010 cm-2), and two-step subgap density of states (DOS) is proposed. This model can describe the electrical characteristics of EDL TFTs well. Oxide-based EDL TFTs show much lower DOS than the typical oxide TFTs. Our results can give hints to optimize the process and electrical performance of EDL TFTs. If both DOS and interface traps are optimized, the on/off-current ratio could be improved.
Keywords :
electric properties; electronic density of states; interface states; semiconductor device models; thin film transistors; DOS; constant mobility; density-of-state; electrical characteristics; electrical performance; interface trap density; interface traps; low-voltage electric-double-layer TFT; low-voltage oxide-based electric-double-layer thin-film transistors; on/off-current ratio; oxide-based EDL TFT; trap modeling; two-step subgap density of states; Dielectrics; Indium tin oxide; Logic gates; Semiconductor device measurement; Thin film transistors; Density of states (DOS); electric-double-layer (EDL) thin-film transistors (TFTs); interface traps; modeling;
Journal_Title :
Electron Device Letters, IEEE
DOI :
10.1109/LED.2011.2106194
