Title :
A CMOS-compatible high-voltage IC process
Author :
Parpia, Zahir ; Salama, C. Andre T ; Hadaway, Robert A.
Author_Institution :
Dept. of Electr. Eng., Toronto Univ., Ont., Canada
fDate :
10/1/1988 12:00:00 AM
Abstract :
A CMOS-compatible high-voltage IC process is proposed and implemented. An important feature of this process is that the extra processing steps do not affect the performance of the low-voltage devices. High-voltage lateral DMOS transistors with breakdown voltages of 400 V, as well as merged MOS-bipolar devices such as lateral insulated-gate transistors (LIGTs) and insulated-base transistors (IBTs) have been fabricated using this process. The IBTs, which have breakdown voltages of 400 V, high current-handling capabilities, and high switching speeds, offer better performance than the LIGTs. In addition the IBT, because it does not latchup, is a more reliable structure than the LIGT
Keywords :
CMOS integrated circuits; power integrated circuits; CMOS-compatible high-voltage IC process; IBTs; breakdown voltages; current-handling capabilities; insulated-base transistors; latchup; lateral DMOS transistors; lateral insulated-gate transistors; low-voltage devices; merged MOS-bipolar devices; switching speeds; CMOS integrated circuits; CMOS process; Displays; Epitaxial layers; Implants; Insulation; Integrated circuit reliability; MOSFETs; Telecommunications; Voltage;
Journal_Title :
Electron Devices, IEEE Transactions on
