Observation of reduced boron penetration and gate depletion for poly-Si/sub 0.8/Ge/sub 0.2/ gated PMOS devices

Poly-Si/sub 0.8/Ge/sub 0.2/-and poly-Si-gated PMOS capacitors with very thin gate oxides were fabricated. Boron penetration and poly-gate depletion effects (PDE) in these devices were both analyzed. Observations of smaller flat-band voltage shift and superior gate oxide reliability suggest less boron penetration problem in poly-Si/sub 0.8/Ge/sub 0.2/-gated devices. Higher dopant activation rate, higher active dopant concentration near the poly/SiO/sub 2/ interface and therefore improved PDE were also found in boron-implanted poly-Si/sub 0.8/Ge/sub 0.2/-gated devices as compared to poly-Si-gated devices. A larger process window therefore exists for a poly-Si/sub 0.8/Ge/sub 0.2/ gate technology with regard to the tradeoff between boron penetration and poly-gate depletion.