High-throughput low-cost VLSI architecture for AVC/H.264 CAVLC decoding

Author

Lee, Gwo Giun ; Lo, C.-C. ; Chen, Yen-Chi ; Lin, Hsin-Yi ; Wang, Ming-Jun

Author_Institution

Dept. of Electr. Eng., Nat. Cheng Kung Univ., Tainan, Taiwan

Volume

4

Issue

2

fYear

2010

fDate

4/1/2010 12:00:00 AM

Firstpage

81

Lastpage

91

Abstract

This study develops a low-cost very-large-scale-integration (VLSI) hardware architecture for entropy coding with increased throughput using the statistical properties of context-based adaptive variable-length coding (CAVLC) in AVC/H.264. Statistical analyses show that better symbol length prediction was achieved by breaking the recursive dependency among codewords for the multi-symbol decoder implementation. The proposed CAVLC decoder easily meets the real-time requirements for high definition (HD) (1920 ?? 1088) applications. The clock speed is only 13 ?? MHz under the best case scenario.

Keywords

VLSI; decoding; entropy codes; statistical analysis; variable length codes; video coding; AVC-H.264 CAVLC decoding; codewords; context-based adaptive variable-length coding; high definition applications; high-throughput low-cost VLSI architecture; multisymbol decoder implementation; recursive dependency; statistical analyses; symbol length prediction; very-large-scale-integration;

fLanguage

English

Journal_Title

Image Processing, IET

Publisher

iet

ISSN

1751-9659

Type

jour

DOI

10.1049/iet-ipr.2008.0064

Filename

5440740