A New Method to Enhance Performance of Digital Frequency Measurement and Minimize the Clock Skew

There are different ways to measure frequency. But in most of the methods the systems are failed to provide good sensitivity or to maintain constant relative errors. This paper presents a new wide-range speed measurement method, using the direct memory access (DMA) terminal count register. The measure ends are interfaced with DMA channels through pipelines to improve hit ratio. Here hit ratio indicates the exact identification of encoder pulses without any fail or miss. The DMA method is based on pulses counting in the constant sampling time at terminal count stop pin of a DMA controller. A pipe line technology is built in the system to reduce the data losses during not ready sequence of DMA operations. But the conventional pipeline system is facing problems due to improper synchronization of clock pulses. This is a universal problem in all the digital systems mostly called jitter or skew. In most of the digital systems the propagation of information mainly controlled on the basis of clock pulses. In most of the digital systems the clock skew decreases the performance of the digital systems. Here a new system is implemented in the path of the clock to remove or reduce the clock skew.