• DocumentCode
    1459211
  • Title

    Hardware-Oriented Algorithm for Quaternion-Valued Matrix Decomposition

  • Author

    Doukhnitch, Evgueni ; Ozen, Emre

  • Author_Institution
    Dept. of Comput. Eng., Istanbul Aydyn Univ., Istanbul, Turkey
  • Volume
    58
  • Issue
    4
  • fYear
    2011
  • fDate
    4/1/2011 12:00:00 AM
  • Firstpage
    225
  • Lastpage
    229
  • Abstract
    In this brief, a generalized form for 2-, 4-, and 8-D coordinate rotation digital computer (CORDIC) rotation matrices is suggested, and a novel highly parallel efficient hardware-oriented 8-D octonion CORDIC algorithm for quaternion-valued matrix decomposition is designed and presented. Furthermore, a successful sequence of iterations with guaranteed convergence is determined, and the hardware implementation of this algorithm is considered. Such a processor can be utilized to speed up the Givens rotations and computing the QR and singular-value decomposition processes of a quaternion matrix in a digital signal processor.
  • Keywords
    digital signal processing chips; iterative methods; singular value decomposition; 2D coordinate rotation digital computer rotation matrix; 4D coordinate rotation digital computer rotation matrix; 8D coordinate rotation digital computer rotation matrix; 8D octonion CORDIC algorithm; Givens rotation; QR computation; digital signal processor; hardware-oriented algorithm; quaternion-valued matrix decomposition; singular-value decomposition process; Algorithm design and analysis; Convergence; Jacobian matrices; Matrix decomposition; Parallel processing; Quaternions; Signal processing algorithms; Givens rotations; QR decomposition and singular-value decomposition (SVD); processor arrays; quaternion matrix;
  • fLanguage
    English
  • Journal_Title
    Circuits and Systems II: Express Briefs, IEEE Transactions on
  • Publisher
    ieee
  • ISSN
    1549-7747
  • Type

    jour

  • DOI
    10.1109/TCSII.2011.2111590
  • Filename
    5720288